9 Technical, Operations & Engineering jobs in Taipei, Hsinchu

[外商半導體設計公司]資深IC實體設計(APR)工程師 工作內容:  負責IC的實體設計，涵蓋以下領域：floorplan、power plan、實體綜合（Physical Synthesis）、時鐘樹綜合（Clock Tree Synthesis）、佈線（Routing）以及DRC/LVS，並從設計到Tapeout。   需求條件:  精通Synopsys工具（ICC2或FC & PrimeTime）或Cadence工具（Innovus & Tempus）的使用。  熟悉完整的netlist-to-GDSII設計...

Responsibilities Provide technical support for key customers, both remotely and onsite, to win and maintain accounts. Assist in the design-in process by solving acoustic and electrical issues, answering product-related questions, reviewing hardware, and performing hands-on debugging. ...

Serdes/AIP/IO layout Over 6 months of Layout experience in 28nm/22nm process nodes. Experience in FinFET Process Layout is a plus. Hands-on experience with Physical Verification (DRC/LVS/ERC/ANT/PERC). Layout experience with Analog IP, high-speed SerDes PHY, and DDRIO is a plus. Familiar with...

Tasks & Responsibilities • Perform circuit design from transistor level to system-level simulation for analog/mixed-signal ICs, including DC/DC, charge pump, LDO, bandgap reference, amplifier, etc. • Collaborate with product definition and business teams on product specifications, feasibility analysis, and im...

Responsibilities Develop complete power management integrated circuits (PMICs) Design functional blocks and macros for DC-DC power converters Oversee and provide guidance on circuit layout, from block level to full IC implementation Collaborate with test, applicati...

Overview Product engineering plays a critical role in delivering high-quality connectivity products to the market. As a Product Engineer, you will: Define and develop test programs for photonic integrated circuits (PICs) and optical engines. Own the definition and optimization of manufa...

Key Responsibilities: Define block-level micro-architecture and develop detailed design specifications. Implement RTL designs while optimizing for power, area, and timing constraints. Collaborate with the Verification team to ensure functional correctness. Work closely with the Backend team t...

Primarily tasked with verifying system-level design Create test plans, test platforms, test cases, reference models, coverage models, and regression suites Conduct RTL simulation, function verification, and fault debugging Lead efforts to attain coverage closure Preferably experienced with ARM-base...

1. Qt C++ for Simulation GUI 2. Write compiler and Parser for verilog and system verilog 3. Optimization for software architecture. 4. Responsible for designing, developing, and debugging on verification EDA (electronic design automation) tool for ESL/RTL SoC design. ======== Qualification ======== ...