32 職務 Hsinchu & Tainan

Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns. Qualifications: More than ...

1. Qt C++ for Simulation GUI 2. Write compiler and Parser for verilog and system verilog 3. Optimization for software architecture. 4. Responsible for designing, developing, and debugging on verification EDA (electronic design automation) tool for ESL/RTL SoC design. ======== Qualification ======== ...