ISP Design Verification Engineer
Taipei
台灣
發佈於: 2024-06-28
職務類別: Permanent
行業類別: 半導體
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Responsibilities:
- Modeling Infrastructure and Tooling support.
- Creating and maintaining ISP block verification environment.
- Generating and validating reference traces and patterns.
- Collecting and analyzing ISP block constraints.
- Experience with design verification environments for ASIC/FPGA development.
- Experience with large software systems and tooling development for IC development flow.
- Experience with image processing
- 3 years of experience with software development.
- 1 year of experience with software design, unit testing and scripting.
- Excellent communication and interpersonal skills.
職位聯繫人
Matt Hsu
+886 2 7750 5717
Fyte
32F, No.333, Sec. 1, Keelung Rd., Xinyi District,
Taipei
Greater China